Differences

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--- arm:armv6-m [2020/07/23 12:15] – utedass
+++ arm:armv6-m [2022/09/12 00:30] (current) – external edit 127.0.0.1
@@ Line 10: / Line 10: @@
 ====== Registers ======
+[[https://azeria-labs.com/arm-data-types-and-registers-part-2/|Nice page, maybe not specifically armv6-m]]
 ^ Register ^ Special function ^ Description                          ^
 | R0-R12   | -                | General purpose 32-bit registers     |
@@ Line 15: / Line 17: @@
 | R14      | LR               | Link Register stores the Return Link |
 | R15      | PC               | Program Counter, stores the address to the <wrap hi>next</wrap> instruction |
+====== Exceptions and interrupts ======
+The vector table, B1.5.3
 ====== Assembler ======
+A comprehensive list of mnemonics (several architectures, not only v6-m): [[https://www.keil.com/support/man/docs/armasm/armasm_dom1361289850509.htm|Keil Assembler User Guide]].
 ===== Conditional execution, A6.3 =====
 Instruction mnemonics can be followed by a suffix to specify conditional execution.
+[[https://www.keil.com/support/man/docs/armasm/armasm_dom1361289860997.htm|Keil Assembler Guide]]
 ^ cond ^ Mnemonic extension ^ Description                  	   ^ Condition flags   ^
 | 0000 | EQ                 | Equal       						   | Z == 1            |
@@ Line 37: / Line 45: @@
 | 1110 | None (AL)          | Always (unconditional)      		   | Any               |
+Example
+<code arm>
+BNE my_fancy_label
+</code>
+===== Addressing =====
+The ARMv6-M only supports offset addressing.
+The syntax is ''<Rn>, <offset>'' where ''Rn'' contains the base address and ''offset'' is either an immediate value or a register, ''Rm'', containing the offset from the base address.
 ===== Instructions, A6.7 =====
 There is a comprehensive list of instructions for the ARMv6-M in chapter A6.7.
+A good tutorial at [[https://azeria-labs.com/arm-instruction-set-part-3/]].