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This shows you the differences between two versions of the page.

--- arm:armv6-m [2020/07/23 10:36] – created utedass
+++ arm:armv6-m [2022/09/12 00:30] (current) – external edit 127.0.0.1
@@ Line 10: / Line 10: @@
 ====== Registers ======
+[[https://azeria-labs.com/arm-data-types-and-registers-part-2/|Nice page, maybe not specifically armv6-m]]
 ^ Register ^ Special function ^ Description                          ^
 | R0-R12   | -                | General purpose 32-bit registers     |
 | R13      | SP               | Stack Pointer                        |
 | R14      | LR               | Link Register stores the Return Link |
-| R15      | PC               | Program Counter                      |
+| R15      | PC               | Program Counter, stores the address to the <wrap hi>next</wrap> instruction |
+====== Exceptions and interrupts ======
+The vector table, B1.5.3
+====== Assembler ======
+A comprehensive list of mnemonics (several architectures, not only v6-m): [[https://www.keil.com/support/man/docs/armasm/armasm_dom1361289850509.htm|Keil Assembler User Guide]].
+===== Conditional execution, A6.3 =====
+Instruction mnemonics can be followed by a suffix to specify conditional execution.
+[[https://www.keil.com/support/man/docs/armasm/armasm_dom1361289860997.htm|Keil Assembler Guide]]
+^ cond ^ Mnemonic extension ^ Description                  	   ^ Condition flags   ^
+| 0000 | EQ                 | Equal       						   | Z == 1            |
+| 0001 | NE                 | Not equal       					   | Z == 0            |
+| 0010 | CS (HS)            | Carry set (unsigned higher or same) | C == 1            |
+| 0011 | CC (LO)            | Carry clear (unsigned lower) 	   | C == 0            |
+| 0100 | MI                 | Minus, negative       			   | N == 1            |
+| 0101 | PL                 | Plus, positive or zero      		   | N == 0            |
+| 0110 | VS                 | Overflow      					   | V == 1            |
+| 0111 | VC                 | No overflow      				   | V == 0            |
+| 1000 | HI                 | Unsigned higher      			   | C == 1 and Z == 0 |
+| 1001 | LS                 | Unsigned lower or same      		   | C == 0 or Z == 1  |
+| 1010 | GE                 | Signed greater than or equal        | N == V            |
+| 1011 | LT                 | Signed less than      			   | N != V            |
+| 1100 | GT                 | Signed greater than     			   | Z == 0 and N == V |
+| 1101 | LE                 | Signed less than or equal     	   | Z == 1 or N != V  |
+| 1110 | None (AL)          | Always (unconditional)      		   | Any               |
+Example
+<code arm>
+BNE my_fancy_label
+</code>
+===== Addressing =====
+The ARMv6-M only supports offset addressing.
+The syntax is ''<Rn>, <offset>'' where ''Rn'' contains the base address and ''offset'' is either an immediate value or a register, ''Rm'', containing the offset from the base address.
+===== Instructions, A6.7 =====
+There is a comprehensive list of instructions for the ARMv6-M in chapter A6.7.
-====== Assembler instructions ======
+A good tutorial at [[https://azeria-labs.com/arm-instruction-set-part-3/]].
-A4.1.2 p62